Rapidus Builds a Design Network to Find Customers for Its 2-Nanometer Fab

Rapidus, the state-backed Japanese chipmaker trying to produce 2-nanometer logic chips in Hokkaido by 2027, has spent years proving it can make the transistors. Its newest move is about something harder for a new foundry: getting customers to design chips for it.

On Oct. 5 the company announced the Rapidus Collaborative Open Rapid Ecosystem, or CORE, a framework of partners meant to support development and mass production at its foundry. The first piece is a group of 17 "Design Solution Associates," design-services companies that will act as a bridge between customers and Rapidus and lend their engineering resources to early-stage chip design.

The list mixes electronic-design-automation suppliers, global engineering-services firms and Japanese and Southeast Asian specialists: AION Silicon, Cadence Design Systems, Dai Nippon Printing, GreatAsic Technology, HCL Technologies, Infinecs Systems, Infosys, MavissDesign, MosChip Technologies, NSW, Oppstar Technology, Quest Global Services, SkyeChip, Synopsys, Toppan, Toshiba Information Systems (Japan) and Wipro. Rapidus said it will extend CORE beyond design to EDA, intellectual property and other categories.

The reasoning is straightforward. A foundry is only as attractive as the path to tape out on it. Large chip companies have in-house teams that can learn a new process, but most potential customers rely on design-services firms and on design kits, libraries and verified IP blocks. If those are missing or immature, customers stay with the foundries they know, even at higher cost.

Rapidus has positioned itself as an alternative for customers who want short turnaround times rather than maximum volume. Its government-approved plan for fiscal 2026, endorsed by Japan's New Energy and Industrial Technology Development Organization in April, calls for the company to release its process design kit to customers broadly and to validate the equipment and production-management systems behind its short-turnaround production model on its pilot line in Chitose. On the back end, it is running a chiplet and packaging pilot line at a Seiko Epson plant.

The money is substantial. Rapidus said in February that it had secured 267.6 billion yen in funding from the government and private companies, including 100 billion yen invested by Japan's Information-technology Promotion Agency, which operates under the Ministry of Economy, Trade and Industry. The company said the plan will take it "from its current R&D phase to mass production of 2nm logic semiconductors by 2027."

What Rapidus has not disclosed is a signed volume customer. Public statements by its leadership about the number of companies in discussions describe talks and trial designs, not orders.

That makes the coming year a test of conversion. The markers to watch are general availability of the process design kit, the first public customer tape-outs on Rapidus's 2-nanometer process, and further CORE announcements covering IP and EDA partners. Each would show whether the design network is turning interest into chips.

Mass production in 2027 is the date the government's support is built around. A named customer before then would do more for Rapidus's credibility than any further funding round.