Chips & Supply · United States

Five Things You Didn’t Know About Co-Packaged Optics

Credited to EE Times · eetimes.com · 5h ago

Photograph · EE Times

Why advanced packaging will determine whether CPO can scale for the AI era

Co-packaged optics technology is often described as a photonics breakthrough. But its commercial success will depend just as much on advanced packaging: how optical and electronic components are integrated, connected, protected, and manufactured repeatedly at scale.

Artificial intelligence is driving unprecedented demand for computing power and data movement. As processors become more powerful, the electrical connections that move data between them are becoming a growing constraint. They consume power, create heat and can limit how quickly information moves through an AI system.

Co-packaged optics (CPO) offers a new approach. It brings optical engines much closer to the processors and switches they serve, shortening the high-speed electrical path between the processor or switch and the optical engine, so data can transition to optical transmission closer to the source. The goal is higher bandwidth, lower interconnect energy per bit, and lower latency.

But a key point about CPO is often overlooked: advanced packaging decisions determine whether silicon photonics can be integrated tightly enough with electronics to work reliably in real-world systems. Here’s why:

1. CPO is really a heterogeneous integration challenge

A CPO system must combine components that were historically designed, manufactured and packaged separately. Photonic integrated circuits, electronic chips, interconnects, fibers and supporting structures must operate as one tightly integrated system.

That makes heterogeneous integration central to CPO. Advanced packaging provides the architecture for placing dissimilar components close together while preserving electrical performance, optical alignment and thermal stability. The closer these components are integrated, the shorter the electrical distance data needs to travel before it becomes an optical signal.

This is why the package cannot be treated as a container added after the chips are finished. Packaging choices shape the system from the beginning. They influence component placement, signal paths, power delivery, heat management, testability and ultimately the manufacturability of the final product.

Key takeaway: CPO performance depends on how well multiple technologies function together inside the package, not simply on the performance of any single chip.

2. Advanced packaging turns the promise of CPO into a manufacturable system

CPO architectures can deliver impressive performance on paper. The harder task is reproducing that performance across large numbers of devices with the consistency, yield and reliability required for data center deployment.

Advanced packaging technologies such as fan-out wafer-level packaging, hybrid bonding and 3D stacking create different paths for integrating optical and electronic components. Fan-out approaches can expand the available area for dense interconnects. Hybrid bonding and 3D stacking can bring components even closer together, supporting shorter connections and higher bandwidth density.

Each approach creates its own manufacturing requirements. Interconnects must remain uniform across the wafer. Bonded surfaces must be clean and precisely prepared. Thin and sometimes warped wafers must be handled without damage. Small variations can affect electrical paths, optical alignment and overall yield.

Despite the challenges, analysis by Yole Group shows that large-scale CPO deployments in data centers are expected in 2028 to 2030.

Key takeaway: The winning CPO architectures will be the ones that can move from a successful demonstration to a stable, repeatable and productive manufacturing flow.

3. The spaces between components matter as much as the components themselves

In some 3D stacked and high-density CPO integration schemes, when optical and electronic dies are placed or stacked close together, small gaps remain between them. Those gaps may sound insignificant, but they can become critical points of mechanical and thermal stress.

Advanced inter-die gap fill is designed to protect these densely integrated structures. The deposited material must fill deep or irregular spaces without leaving voids. It must remain stable through later processing and thermal cycling, and it must do so without adding excessive stress or wafer distortion.

Lam Research is addressing this challenge with advanced deposition and wafer-handling capabilities designed for thick, void-free dielectric films and high-bow wafers. These capabilities help support the structural integrity and process control needed for complex CPO and 3D integration schemes.

Key takeaway: In advanced packaging, reliability often depends on controlling the tiny spaces, interfaces and material transitions that are invisible in a high-level architecture diagram.

4. Precision must extend across the entire package

CPO requires precision at multiple levels at once. The optical engine must be positioned relative to the electronics and fiber interface. Electrical interconnects must be formed consistently. Fibers must align with optical interfaces. Bonded layers must remain flat and secure. The package must also withstand heat and mechanical stress during manufacturing and operation.

This system-level precision changes the role of semiconductor manufacturing equipment. Deposition, etch, clean, electroplating, bonding preparation, bevel management and process control must work as a coordinated set of capabilities rather than as isolated process steps.

For example, uniform copper features and redistribution layers help create reliable electrical pathways in fan-out packages. Carefully engineered dielectric films and copper surfaces support high-quality hybrid bonding. Wafer shape and edge condition must also be controlled so that downstream steps can maintain alignment and yield.

Key takeaway: CPO scaling will require precision manufacturing across the full package, from the center of the wafer to its edge and from individual materials to the completed integrated structure.

5. Manufacturing collaboration will decide how quickly CPO scales

No single company or technology can solve the CPO manufacturing challenge alone. CPO brings together chip designers, foundries, packaging specialists, equipment providers, materials suppliers, fiber and connector companies, system makers and data center operators.

These participants will need to make architectural and manufacturing decisions together. A packaging choice can affect the optical interface. A bonding approach can affect the thermal budget. A serviceability requirement can influence how fibers and optical engines are attached. Choices made in one part of the ecosystem can ripple through the entire system.

Lam’s role is to help customers translate new CPO and advanced packaging concepts into repeatable processes through a broad portfolio of deposition, etch, clean, electroplating, wafer-handling and process-control technologies. The objective is not only to enable a device to work, but to support the productivity and consistency required for high-volume manufacturing.

Key takeaway: CPO will scale fastest when design, packaging and process development happen together, with manufacturing treated as a foundation rather than a final step.

CPO is emerging because AI infrastructure needs to move more data with greater energy efficiency. Silicon photonics provides the light-based functionality, but advanced packaging is what brings that functionality close to high-performance electronics and turns it into a usable system. According to Yole Group, the photonics packaging market for co-packaged optics may approach $5 billion by 2031, reflecting growing industry investment in integrating optical and electronic components at scale.

The next phase of CPO will therefore be defined not only by better optical devices, but by better integration. Fan-out packaging, hybrid bonding, 3D stacking, inter-die gap fill, precision interconnects and coordinated process control will all play a role in determining performance, yield, reliability and cost.

For the semiconductor industry, the message is clear: CPO will not advance on architecture alone. Its future will depend on the ability to convert innovation across materials, processes and packaging into manufacturing at scale. That is where advanced packaging takes center stage.

Learn more about how Lam is advancing AI with advanced packaging

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Chips & Supply · United States

ESDS Software Solutions shifts focus to AI factories, each factory to add 10% revenue

Credited to The Hindu BusinessLine · thehindubusinessline.com · 3h ago

Photograph · The Hindu BusinessLine

Company eyes up to 1,000% CAGR from AI factories and ₹3,000 crore revenue from Sharon AI GPU business

By Vallari Sanzgiri

After a 20-50 per cent annual growth, ESDS Software Solutions has aired plans to move beyond the traditional data centre business towards AI factories. Company Managing Director and Chairman Piyush Somani talked of plans for a 10 per cent revenue boost with every AI factory deployed in coming months in a conversation with businessline.

“We are done with the traditional data centre business. We will not further expand to that business model. It may grow at a 30-40 per cent CAGR, but AI factories have the potential to grow at a 500 per cent or even 1,000 per cent CAGR,” said Somani.

The company currently utilises close to 85 per cent of its existing data centre capacity and is increasing capacity for the next three data centres expected to be up and running within the next three months. Somani also expects software services and managed services to shrink in the near future as the infrastructure business (data centres, GPUs and the future AI factories) scales and takes up a larger slice of the revenue share.

“In the long run the infrastructure services may even go up to 90 per cent of total revenue share,” he said.

While mindful of the component crunch, Somani during the company’s earnings call pointed out that India is the only country which has got 40-50 gigawatts surplus to be given for AI factories over the next four to five years. This gives India a huge advantage, as per the management.

“We are targeting India also because 40-50 gigawatts surplus power will be available for AI factories and the government is also trying to promote AI factories in India,” said Somani. By December, one of the company’s AI factories will go live, followed by another factory in May.

The company also expects a revenue of ₹3,000 crore from its Sharon AI GPU business, while setting aside IPO proceeds plus customer advance worth ₹1,500 crore as capital expenditure for FY27.