Power & Sites · United States

Data Center Energy Trends Force a Rethink of Chip Power Delivery

Credited to SemiWiki · semiwiki.com · 21h ago

Intel Foundry published a two article series on chip power delivery that are worth reading. Here is a quick summary:

Artificial intelligence is changing the requirements for semiconductor innovation. Faster transistors and denser packaging remain essential, but their benefits increasingly depend on another engineering challenge: delivering stable power to the places where computation happens. Intel Foundry’s two-part series on power delivery explains why electricity distribution and voltage regulation are becoming central to the future of data center performance.

The scale of projected demand makes this shift significant. In the first article, Intel Foundry cites Gartner estimates that worldwide data center power demand will rise from 104 gigawatts in 2025 to 132 gigawatts in 2026, reaching 290 gigawatts by 2030. AI-optimized servers are expected to account for 31% of consumption in 2026 and surpass conventional servers by 2027.

These are forecasts, but they highlight a practical constraint: computing expansion depends on available electricity and cooling capacity. Operators must divide limited power budgets among processors, memory, networking, and storage. Improving how electricity travels through compute hardware could help increase useful output within those budgets. That makes power delivery relevant to infrastructure economics as well as chip design.

Conventional frontside power delivery routes electricity and signals through shared metal layers. As designs become more complex, those functions compete for space. Rising current increases voltage losses through resistance, while inductance complicates responses to sudden workload changes. Engineers compensate with wider connections, additional capacitors, and operating margins, consuming resources and potentially sacrificing efficiency to maintain reliable operation.

Intel Foundry’s RibbonFET Gate-all-around (GAA) transistor architecture with Intel 18A, separates these functions by moving power routing to the chip’s backside. Dedicated power layers create shorter paths to transistors and free frontside resources for signals. Intel says this arrangement reduces resistance, inductance, and IR drop, the voltage lost as current passes through resistance, while improving the stability of the supply.

Local energy storage complements that architecture. Intel Foundry describes Omni MIM on-die capacitors, substrate-embedded capacitors with through-silicon vias, and embedded deep trench capacitors. These components provide nearby charge when demand suddenly increases. For bursty AI inference and high-performance computing workloads, that support can help limit brief voltage dips that otherwise threaten timing or require more conservative operating settings.

The second article extends the problem to chiplets and stacked dies. Combining multiple dies enables greater bandwidth and functional integration, but also concentrates current demand and increases the number of voltage domains. Package connections must carry power alongside dense signal traffic. Consequently, advanced packaging can create electrical bottlenecks even as it solves other constraints on performance scaling.

Intel Foundry’s response is to move voltage conversion closer to the load. Distributing power at a higher voltage reduces the current required to carry a given amount of power; conversion near the compute die then supplies its lower operating voltage. This approach can reduce distribution losses, although its overall benefit depends on regulator efficiency and the complete delivery network.

The authors describe several implementations. Fully integrated voltage regulators place the final conversion stage on the processor, supported by CoaxMIL magnetic inductors designed for higher current density. Continuous capacitive voltage regulators, or C2VR, use capacitors instead of traditional inductors. Dedicated regulator chiplets offer placement flexibility, including beneath compute dies or within package structures, potentially shortening demanding power distribution paths.

Why it matters is the connection between electrical stability and usable performance. A processor cannot consistently exploit its capabilities if supply voltage fluctuates beyond acceptable limits. Better routing, localized charge storage, and nearby regulation could reduce the margins required for safe operation. That creates opportunities for more efficient computing, while helping designers manage increasingly complex systems.

Bottom line: Scaling computation now requires coordinated advances across transistors, wiring, capacitors, regulators, and packaging. Power delivery is becoming a decisive factor in whether additional silicon produces worthwhile performance within increasingly constrained energy budgets.

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TechnologyUnited States

Nvidia-backed Lumentum sold out of AI server parts till 2029

Credited to The Japan Times · japantimes.co.jp10h ago

Useful

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Lumentum Holdings’ optical components are “completely sold out” through early 2029 on demand from tech companies clamoring for faster artificial intelligence data centers, according to its chief executive officer.

Lumentum is unable to meet about 70% of demand for some products through next year, and won’t be able to address 30% of demand for some other products through 2028, Michael Hurlston said in an interview in Tokyo on Friday. Just six months ago, Hurlston said Lumentum was on track to sell out its capacity by 2028.

The company, which received an investment of $2 billion from Nvidia earlier this year along with rival Coherent, supplies advanced indium phosphide devices that help enable high-speed cloud computing and data transmission. Analysts on average expect Lumentum’s sales to more than double this year.

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Power & Sites · United States

Nvidia-backed Upscale takes on AI networking silos with Token Fabric

Credited to Network World · networkworld.com · 19h ago

Photograph · Network World

AI clusters depend on two types of networking. Scale-up networking connects accelerators inside a rack. Scale-out networking connects racks across the data center. A single AI job spans both, which is a challenge for many organizations that tend to treat the two as separate networks.

Networking startup Upscale today introduced Token Fabric to bring the two together. The architecture combines the company’s own SkyFabriX scale-up silicon, scale-out systems built on Nvidia Spectrum-X Ethernet, and a common software layer for operations. General availability is planned for early 2027. Early-access and joint-validation programs are running now.

The announcement builds on two earlier milestones. Upscale, based in Santa Clara, Calif., emerged from stealth in September 2025 with a $100 million seed round. In June, it raised an additional $190 million and outlined plans for SkyHammer, its custom scale-up switch chip. SkyFabriX is based on that SkyHammer architecture. Nvidia, which supplies the Spectrum-X silicon, joined the June round. Upscale has now raised about $500 million and has more than 300 employees.

“If you look at compute, compute is ramping up on a rapid scale, and networking has fallen way behind,” Barun Kar, CEO of Upscale, told Network World.

What is inside Token Fabric

Token Fabric is a combination of hardware and software for both scale-up and scale-out.

All three options draw on the same portfolio of silicon, systems and software. “Everything has to be integrated, so that’s where we come in,” Kar said. “We are vertically stacked.”

How Token Fabric works

Token Fabric is built from the protocol layer up.

Upscale is extending existing protocols and does not replace them. Scale-up traffic uses ESUN and standard Ethernet/IP. Scale-out traffic uses standard Ethernet with RoCE, which carries remote direct memory access over Ethernet.

Upscale is also contributing to the open projects underneath the stack. They include SONiC, extensions of the Switch Abstraction Interface (SAI) for ESUN, the Ultra Ethernet Consortium (UEC) and UALink.

Software ties the two fabrics together. SkyOS abstracts the underlying hardware and provides a control plane across the cluster. SkyCMD exposes that control plane through one layer. Multiple network elements sit behind it, and any compute platform in a heterogeneous cluster can use it to control the network.

“Your operating system has to be lean, mean in order to be fast, flexible, and secure,” Kar said. “And then you have to have the orchestration layer on top to enable things like heterogeneous compute.”

Are tokens the new metric for network performance?

Network teams have traditionally tracked packets, throughput, loss, and jitter. The question for an AI network is whether tokens are the right unit of optimization.

“I would say that’s the right thing,” Kar argued.

Kar noted that users pay based on tokens today. He named time to first token, tokens per second, tokens per dollar, and tokens per watt as the measures. Optimizing those measures requires networking, especially in clusters that scale to hundreds of thousands of accelerators.

There is, however, a bit of a gap with many networks today that makes it difficult to optimize for token operations. According to Kar, the main components of the gap are latency, bandwidth, and scale-up features in the silicon. On the software side, he said predictive analytics and telemetry keep machines running.

The other side of the challenge is optimizing the networking with agentic AI. To that end, Upscale has directly built agent-based operations into the platform.

“An agent is always looking at your network, trying to figure out whether your cables will fail or your optics will fail or if there’s congestion, and the agents are looking for ways around it,” Kar said.